IC Design

design and verification

September, 2018

now browsing by month

 

openHMC Controller

Open Silicon HMC Memory Controller IP.gif

https://ra.ziti.uni-heidelberg.de/cag/research/recent-research-projects/openhmc

Installing QuestaSim 10.4C

http://pan.baidu.com/s/1mg4GxHQ

pass download : 2qtu

 

UVM Cookbook Complete Verification Academy 2018

http://www.mediafire.com/file/2da4erz2znp7ppe/%255Buvm-cookbook_2018.pdf/file

 

 

[Book] Computer Arithmetic and Verilog HDL Fundamentals-CRC Press (2009)

http://www.mediafire.com/file/dd7ptmllksuuyes/%255BComputer_Arithmetic_and_Verilog_HDL_Fundamentals-CRC_Press_%25282009%2529.pdf/file

 

[CICC 2016 Tutorial] Phase-Locked Frequency Synthesis and Modulation for Modern Wireless

http://www.mediafire.com/file/lvfzidig268k5nv/CICC_2016_Tutorials_Phase-Locked_Frequency_Synthesis_and_Modulation_for_Modern_Wireless.pdf/file

 

[Book] SATA Storage Technology: Serial ATA

http://www.mediafire.com/file/k8332w1gohf7t04/%255BMindShare__SATA_Storage_Technology.pdf/file

 

SystemVerilog Testbench Workshop

http://www.mediafire.com/file/d3683qb304amynm/SystemVerilog_Testbench_Student_Guide.pdf/file

 

Modern_DRAM_Architecture

http://www.mediafire.com/file/bmy9llezhhw09ja/%255BMindShare_Modern_DRAM_Architecture_h1.pdf/file

 

[Book] Digital VLSI Chip Design with Cadence and Synopsys CAD Tools

http://www.mediafire.com/file/l5g5v9l83l86rbb/%255BDigital_VLSI_Chip_Design_with_Cadence_and_Synopsys_CAD_Tools.pdf/file

 

[Book] Constraining Designs for Synthesis and Timing Analysis

http://www.mediafire.com/file/7q22c3l57pfb898/%255BConstraining_Designs_for_Synthesis_and_Timing_Analysis.pdf/file