IC Design

design and verification

March, 2019

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[Phd thesis] FPGA Architectures for Low Precision Machine Learning

http://www.mediafire.com/file/mdrr9c4m9jznlxh/%255BFPGA_Architectures_for_Low_Precision_Machine_Learning.pdf/file

 

[Master Thesis] BINARY RECURRENT UNIT: USING FPGA HARDWARE TO ACCELERATE INFERENCE IN LONG SHORT-TERM MEMORY NEURAL NETWORKS

http://www.mediafire.com/file/p3t22nbbjh6ecmz/Binary_Recurrent_Unit_Using_FPGA_Hardware_to_Accelerate_Inference_In_Long_Short-Term_Memory_Neural_Networks.pdf/file

 

 

 

[Master Thesis] Development of hardware accelerators on FPGA for convolutional neural networks

http://www.mediafire.com/file/qs3sg9h9ao0iazy/Development_of_hardware_accelerators_on_FPGA_for_convolutional_neural_networks.pdf/file

 

 

[phd thesis] Cryptographic Coprocessors for Embedded Systems

http://www.mediafire.com/file/ixhm6ihvcoik283/%255BCryptographic_Coprocessors_for_Embedded_Systems.pdf/file

 

 

[phd thesis] ACCELERATING MACHINE LEARNING APPLICATIONS WITH FPGAS

http://www.mediafire.com/file/22v23p42gdzhrx8/%255BAccelerating_machine_learning_applications_with_FPGAs.pdf/file

 

[book] Architectures for Computer Vision: From Algorithm to Chip with Verilog

http://www.mediafire.com/file/vb3jqary5o6s1a1/%255BArchitectures_for_Computer_Vision__From_Algorithm_to_Chip_with_Verilog-Wiley_%25282014%2529.pdf/file