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[phd thesis] Cryptographic Coprocessors for Embedded Systems

http://www.mediafire.com/file/ixhm6ihvcoik283/%255BCryptographic_Coprocessors_for_Embedded_Systems.pdf/file

 

 

[phd thesis] ACCELERATING MACHINE LEARNING APPLICATIONS WITH FPGAS

http://www.mediafire.com/file/22v23p42gdzhrx8/%255BAccelerating_machine_learning_applications_with_FPGAs.pdf/file

 

[book] Architectures for Computer Vision: From Algorithm to Chip with Verilog

http://www.mediafire.com/file/vb3jqary5o6s1a1/%255BArchitectures_for_Computer_Vision__From_Algorithm_to_Chip_with_Verilog-Wiley_%25282014%2529.pdf/file

 

 

High Performance Integer Arithmetic Circuit Design on FPGA

http://www.mediafire.com/file/4ze0ils57s3l9ij/%255BHigh_Performance_Integer_Arithmetic_Circuit_Design_on_FPGA__Architecture%252C_Implementation.pdf/file

Efficient Methods and Hardware for Deep Learning

http://www.mediafire.com/file/hcoy91xa3wdy5r7/Efficient_Methods_and_Hardware_for_Deep_Learning.pdf/file

 

 

H.265 Encoder IP

  • HEVC/H.265 Main Profile
  • YUV 4:2:0
  • Bitdepth 8
  • 4K@30fps, 400MHz
  • GOP: I/P
  • CU: 8×8~64×64
  • PU: 4×4~64×64
  • TU: 4×4/8×8/16×16/32×32
  • 1/4 Sub-pixel
  • Search range 32
  • All 35 Intra prediction mode
  • CABAC
  • Deblocking Filter
  • SAO
  • Rate control: CBR/VBR (Software)

http://www.mediafire.com/file/pund39n5d45u086/h265_encoder.rar/file

10/100Mb/s Ethernet IP Core

Design Features.

– Performing MAC layer functions of IEEE 802.3.

– Automatic 32-bit CRC generation and checking.

– AXI4 Slave interface.

– Supports MDIO.

– 4KB SRAM Ping-pong TX buffer.

– 4KB SRAM Ping-pong RX buffer.

– Receive and Transmit Interrupts.

– Automatically pad short frames on transmit.

– Collision detection and auto retransmission on collisions in half duplex mode (CSMA/CD protocol).

– Loopback mode.

THE NVIDIA DEEP LEARNING ACCELERATOR

http://www.mediafire.com/file/wgfpl43qha0dwae/2.08_NVidia_DLA_Nvidia_DLA_HotChips_10Aug18.pdf/file

[Phd Thesis] Energy-Efficient VLSI Architectures for Real-Time and 3D Video Processing

http://www.mediafire.com/file/c7kk4c19qt6mo86/Energy-Efficient_VLSI_Architectures_for_Real-Time_and_3D_Video_Processing.pdf/file

[ISSCC 2018 Short Course] Introduction to Deep Learning and Inference: A Hardware Perspective

http://www.mediafire.com/file/mjzg740tqfa3wm4/ISSCC_2018_Short_Course_Introduction_to_Deep_Learning_and_Inference_A_Hardware_Perspective.pdf/file